vault backup: 2025-03-03 09:42:47

This commit is contained in:
Marco Realacci 2025-03-03 09:42:47 +01:00
parent 34e911fa9e
commit 6fc3d042b8

View file

@ -108,7 +108,34 @@ We will consider different computational models according to the available level
Atomic R/W registers are storage units that can be accessed through two operations (READ and WRITE) such that
1. Each invocation of an operation
- locks instantaneous (it can be depicted as a single point on the timelinethere exist $t : OpInv \to R+$)
- locks instantaneous (it can be depicted as a single point on the timeline: there exist $t : OpInv \to R+$)
- may be located in any point between its starting and ending time
- does not happen together with any other operation
2. Every READ returns the closest preceeding value written in the register, or the initial value (if no WRITE has occurred).
- does not happen together with any other operation ($t$ is injective)
2. Every READ returns the closest preceding value written in the register, or the initial value (if no WRITE has occurred).
### Peterson algorithm (for two processes)
Let's try to enforce MUTEX with just 2 processes.
1st attempt:
```
lock(i) :=
AFTER_YOU <- i
wait AFTER_YOU != i
return
unlock(i) :=
return
```
This protocol satisfies MUTEX, but suffers from deadlock (if one process never locks).
2nd attempt:
```
Initialize FLAG[0] and FLAG[1] to down
lock(i) :=
AFTER_YOU <- i
wait AFTER_YOU != i
return
unlock(i) :=
return
```