vault backup: 2025-03-03 10:06:24
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@ -154,4 +154,14 @@ lock(i) :=
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unlock(i) :=
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FLAG[i] <- down
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return
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```
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```
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**Features:**
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- it satisfies MUTEX
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- it satisfies bounded bypass, with bound = 1
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- it requires 2 one-bit SRSW registers (the flags and 1 one-bit MRMW registers (AFTER_YOU)
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- Each lock-unlock requires 5 accesses to the registers (4 for lock and 1 for unlock)
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##### MUTEX proof
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Assume p0 and p1 are simultaneously in the CS.
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How has p0 entered its CS?
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