vault backup: 2025-03-17 22:52:45

.obsidian/workspace.json

@@ -34,9 +34,9 @@
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               "state": {
                 "file": "Concurrent Systems/slides/class 5.pdf",
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+                "page": 7,
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+                "top": 364,
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@@ -217,10 +217,10 @@
   },
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   "lastOpenFiles": [
+    "Concurrent Systems/slides/class 5.pdf",
+    "Concurrent Systems/notes/5 - Software Transactional Memory.md",
     "Concurrent Systems/notes/4c - Dining Philosophers.md",
     "Concurrent Systems/notes/4 - Semaphores.md",
-    "Concurrent Systems/notes/5 - Software Transactional Memory.md",
-    "Concurrent Systems/slides/class 5.pdf",
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Concurrent Systems/notes/5 - Software Transactional Memory.md

@@ -105,3 +105,10 @@ The **casual past** of a transaction T is the set of all T' and T'' such that
 VWC allows more transactions to commit -> it is a more liberal property than opacity.
 
 ![[Pasted image 20250317105355.png]]
+
+#### A Vector clock based STM system
+We have m shared MRMW registers; register X is represented by a pair XX, with:
+- XX.val the current value of X
+- XX.depend[1...m] a vector clock s.t.
+	- XX.depend[X] is the sequence number associated with the current value of X
+	- XX.depend[Y] is the sequence number associated with the value of Y on which the current value of X depends from